TechConnect World 2020
Co-Located with Nanotech 2020 SBIR/STTR Spring AI TechConnect
Nanotech 2020
 

2020 Workshop on

Compact Modeling

WCM 2020

WCM - Compact Modeling

Abstracts due - December 13

Symposium Chair

Xing ZhouXing Zhou
Professor
Nanyang Technological University, Singapore


 

Compact Models (CMs) for circuit simulation have been at the heart of CAD tools for circuit design over the past decades, and are playing an ever increasingly important role in the nanometer system-on-chip (SOC) era.  As the mainstream MOS technology is scaled into the nanometer regime, development of a truly physical and predictive compact model for circuit simulation that covers geometry, bias, temperature, DC, AC, RF, and noise characteristics becomes a major challenge.

Workshop on Compact Modeling (WCM), now celebrating it's 15th year, was one of the first of its kind in bringing people in the CM field together. The objective of WCM is to create a truly open forum for discussion among experts in the field as well as feedback from technology developers, circuit designers, and CAD tool vendors. The topics cover all important aspects of compact model development and deployment, within the main theme - compact models for circuit simulation, which are largely categorized into the following groups:

  • Intrinsic Models
    • Bulk MOSFET
    • SOI MOSFET (partial-/full-depletion)
    • Multiple-Gate FET (DG/TG/GAA)
    • High-Voltage/LDMOS
    • Thin-Film Transistor (TFT)
    • Schottky-Barrier/Tunneling/Junctionless FET (SB-FET/JLFET/TFET)
    • Bipolar/Junction (BJT/HBT/SiGe/JFET)
    • HEMT (GaN/InGaP/InGaAs)
    • Non-quasi-static
    • RF
  • Extrinsic/Interconnect Models
    • Parasitic elements
    • Passive device
    • Diode
    • Resistor
    • ESD
    • Interconnect
  • Atomic/Quantum Models
    • Ballistic device
    • Carbon-Nanotube/Graphene FET (CNFET/GFET)
    • Organic FET
  • Statistical Variability/Reliability/Noise Models
    • Statistical variability
    • Reliability/hot carrier
    • Mismatch
    • Noise
  • Multi-Level Models
    • Subcircuit model
    • Gate/block model
    • Behavioral model
    • Numerical/TCAD/table-based
  • Model Extraction and Interface
    • Parameter extraction and optimization
    • Model-simulator interface
    • Model standardization
    • Model development platform
    • Verilog-A

Submit Your Abstract

Please first review the information for authors — abstract submission guidelines.

 
 
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