TechConnect World 2020
Co-Located with Nanotech 2020 SBIR/STTR Spring AI TechConnect
Nanotech 2020
 

2020 Workshop on

Compact Modeling

WCM 2020

WCM - Compact Modeling

Submit your Poster Abstract - due April 10

Please first review the information for authors — abstract submission guidelines.

 

Symposium Chair

Xing ZhouXing Zhou
Professor
Nanyang Technological University, Singapore

Key Speakers

Michael ShurMulti segment compact terahertz SPICE/ADS model
Michael Shur
Patricia W. and C. Sheldon Roberts Professor of Solid State Electronics, Rensselaer Polytechnic Institute

Lan WeiCryo-CMOS Modeling for Quantum Computing Applications
Lan Wei
Assistant Professor, University of Waterloo

Compact Models (CMs) for circuit simulation have been at the heart of CAD tools for circuit design over the past decades, and are playing an ever increasingly important role in the nanometer system-on-chip (SOC) era.  As the mainstream MOS technology is scaled into the nanometer regime, development of a truly physical and predictive compact model for circuit simulation that covers geometry, bias, temperature, DC, AC, RF, and noise characteristics becomes a major challenge.

Workshop on Compact Modeling (WCM), now celebrating it's 15th year, was one of the first of its kind in bringing people in the CM field together. The objective of WCM is to create a truly open forum for discussion among experts in the field as well as feedback from technology developers, circuit designers, and CAD tool vendors. The topics cover all important aspects of compact model development and deployment, within the main theme - compact models for circuit simulation, which are largely categorized into the following groups:

  • Intrinsic Models
    • Bulk MOSFET
    • SOI MOSFET (partial-/full-depletion)
    • Multiple-Gate FET (DG/TG/GAA)
    • High-Voltage/LDMOS
    • Thin-Film Transistor (TFT)
    • Schottky-Barrier/Tunneling/Junctionless FET (SB-FET/JLFET/TFET)
    • Bipolar/Junction (BJT/HBT/SiGe/JFET)
    • HEMT (GaN/InGaP/InGaAs)
    • Non-quasi-static
    • RF
  • Extrinsic/Interconnect Models
    • Parasitic elements
    • Passive device
    • Diode
    • Resistor
    • ESD
    • Interconnect
  • Atomic/Quantum Models
    • Ballistic device
    • Carbon-Nanotube/Graphene FET (CNFET/GFET)
    • Organic FET
  • Statistical Variability/Reliability/Noise Models
    • Statistical variability
    • Reliability/hot carrier
    • Mismatch
    • Noise
  • Multi-Level Models
    • Subcircuit model
    • Gate/block model
    • Behavioral model
    • Numerical/TCAD/table-based
  • Model Extraction and Interface
    • Parameter extraction and optimization
    • Model-simulator interface
    • Model standardization
    • Model development platform
    • Verilog-A
 
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Symposium Sessions

Tuesday June 30

8:30WCM - High-frequency & Cryo-temperature Device Models
10:30WCM - Capacitance/Resistance & Hybrid Circuit Models
1:30WCM - Memory & Photonic Device Models

Symposium Program

Tuesday June 30

8:30WCM - High-frequency & Cryo-temperature Device Models
Session chair: Xing Zhou, Nanyang Technological University, SG
Multi segment compact terahertz SPICE/ADS model
M. Shur, X. Liu, T. Ytterdal, Rensselaer Polytechnic Institute, US
High frequency RF model of GaN HEMTs
Z. Zhaomin, H. Yanmei, Beibu-gulf University, CN
Cryo-CMOS Modeling for Quantum Computing Applications
X. Chen, H. Elgabra, L. Wei, University of Waterloo, CA
10:30WCM - Capacitance/Resistance & Hybrid Circuit Models
Session chair: Zhaomin Zhu, Beibu Gulf University, CN
MIT Virtual Source Negative Capacitance (MVSNC) Model: Applications to High-Frequency NCFETs and Neuromorphic Devices
U. Radhakrishna, A. Zubair, M. Theng, T. Palacios, D. Antoniadis, Massachusetts Institute of Technology, US
Temperature-Dependent Resistance Model for Cu-Alloy Wires
N. Lu, R. Wachnik, IBM, US
Monolithic III-V/Si Technology Co-integration and Hybrid Circuit Co-design
X. Zhou, S.B. Chiah, B. Syamal, Nanyang Technological University, SG
1:30WCM - Memory & Photonic Device Models
Session chair: Ujwal Radhakrishna, Massachusetts Institute of Technology, US
A Complete Physics-based RRAM Compact Model for Reliable Circuit Simulations of Logic-in-Memory and Neuromorphic Architectures
F.M. Puglisi, T. Zanotti, P. Pavan, Università di Modena e Reggio Emilia, IT
Multiscale Modeling Platform Development: a Neuromorphic Memory Case
F. Nardi, A. Padovani, M. Pesic, L. Larcher, Applied Materials, US
Compact Modeling of Current-Assisted Photonic Demodulator (CAPD) for Distance Measurement
C.J. Estrada, L. Zhang, M. Chan, HKUST, HK
Modeling of photo-electric interaction in Photonic Demodulators
C.J. Estrada, L. Zhang, M. Chan, HKUST, HK
 
2019 Sponsors & Partners
2019 Sponsors & Partners