G. Mamatha, V. Akshaya
jawaharlal technological university ananthapur,
India
Keywords: ananth,a2o,open power processor,ethernet,spi,dma,i2c
Summary:
"ANANTH 1.0" is a fabless SoC (System on Chip) designed and developed at VLSI labs, Electronics and Communication Engineering Department, JNTUA college of engineering, Anantapur, Under academic collaboration with Open Power foundation and International Business Machines (IBM) Inc. This is a fabless SoC built around IBM POWER A2I CORE and also has peripherals like AHB, AXI, SPI, I2C, ETHERNET, NAND, NOR, 1 WIRE AUTHENTICATION, BLUETOOTH, DMA, JTAG. This is indigenously developed fabless SoC for academic R&D purposes. SoCs include external interfaces, typically for communication protocols. These are often based upon industry standards such as USB, FireWire, Ethernet, USART, SPI, HDMI, I2C, etc. These interfaces will differ according to the intended application. Wireless Networking protocols such as WiFi, Bluetooth, 6LoWPAN and near-field communication may also be supported. When needed, SoCs include analog interfaces including analog-to-digital and digital-to analog converters, often for signal processing. These may be able to interface with different types of sensors or actuators, including smart transducers. They may interface with application-specific modules or shields. Or they may be internal to the SoC, such as if an analog sensor is built in to the SoC and its readings must be converted to digital signals for mathematical processing.