Components for Ultra-Power-Efficient, and Self-Learning RF-Photonic Processors with In-Memory Programmability

S. Cheung, E. Shin, A. Akib
North Carolina State University,
United States

Keywords: photonic integrated circuits, RF-photonics, heterogeneous integration, silicon photonics, hybrid photonics

Summary:

The current technology used to build on-chip programmable RF-photonics has been proto-typed on technology platforms such as Si and SiN with power hungry thermal phase shifters. These thermal based Mach-Zehnder Interferometers (MZIs) can consume > 1 – 2 mW/pi static power consumption, thus making large scale integrated circuits (> 1000 devices) prohibitive due to significant power consumption on the order of several Watts. Furthermore, memory is accessed off-chip leading to increased latency and further power consumption. In addition, these demonstrations have yet to be implemented on a platform that fully integrates all the necessary components (lasers, modulators, detectors, etc.) to realize seamless active/passive photonic integration. As a result off-chip active devices need to be attached to the programmable RF-photonic circuit via fibers and complex, time-consuming packaging/assembly. In order to achieve desirable SWaP metrics, there is a need to seamlessly integrate the mentioned active devices on one monolithic and heterogeneous platform. Prior demonstrations of RF-photonics are typically application-specific integrated photonic chips usually limited to 1 functionality with little degree of re-configurability and flexibility. In this abstract we discuss and demonstrate some of the devices needed to realize an ultra-power efficient, self-learning, and general purpose programmable processor with co-integrated memory for RF-photonic applications. The proposed solution addresses key items in next-generation 5/6 G wireless systems where reconfigurable filtering, frequency conversion, arbitrary waveform generation, and beam-forming cannot be performed on 1 common chip and satisfy various size, weight, and power (SWaP) requirements. From a device perspective, we demonstrate the possibility of full photonic programming with record energy-efficiency (1,000,000x improvement) and the ability to self-learn due to optical in-memory processing. Optical memory is realized by co-integration of electronic memory with photonics to reduce Von-Neumann bottleneck latencies.